RESOURCES FOR EE's.
Welcome to EE.COM. Here you will find a number of resources for electrical and computer engineers. Here you will find some resources for EE's that may help you with your projects. We also do consulting, so do check out our consulting background. Here you will find links to open source code that can be used for design, libraries and educational and informational facilities that will help empower the professional engineer. Ideas are welcome to help improve this site.
For VLSI design, a very interesting tool: ELECTRIC, is written as open-source in Java. This is an advanced tool including schematic capture, layout, DRC, LVS and more. Note that on Thursday, June 4th, 2009 the IEEE will be holding a seminar on ELECTRIC at UC Santa Cruz (California), all are welcome to attend, see www.ee.com/electric for more details.
Another VLSI layout, Magic provides a very good infrastructure for the purpose, even including the ability to do parasitics extraction from your layout. An introduction to Magic by its author can be found here. You can download Magic and learn more from: http://opencircuitdesign.com/magic/
For logic simulation and verification Verilog has proven to be a very popular language. There is an excelent open source version of Verilog, that has been around for many years, called Icarus, written by Stephen Williams. You can download this resource from here.
But what good is a Verilog simulator without a good waveform viewer. Since Icarus supports the VCD output standard, you can use the open source program GTKWave to help in this area. You can access this waveform viewer from here, along with other interesting EDA tools.
Another useful tool for simulation is SystemC. This is a programming system that allows you to simulate circuits using C++. There is a tutorial available and the code is also available as open source. It works both on PC's and Linux boxes, and it is also now an IEEE standard. You can access the System C source code and additional resource http://www.systemc.org/home.
Circuit simulation is at the core of VLSI design and all sorts of circuit design. It allows a person to simulate in detail the timing and power that is used in todays sub-micron geometry devices. The SPICE software originally developed at Berkeley University has been the dominant tool to deal with this of over 40 years! Today many companies support SPICE, and SPICE2.0 written in Fortran is freely available from UC Berkeley. Spice comes with many device models, which is where modern research spends its time. The Berkeley University's Device Modeling group, has been recognized as the major leader in this field. you can visit them here. They develop and integrate the very poplular BSIM models, with differnt types of capabilities. These also include a model the BSOI model for VLSI developed on an insulating substrate. The BSIM models come with C code that can be linked in with the Berkeley type simulators.
There are many different resources with relation to open source for SPICE. One of my favorites is the gnucap software. This software is considerably different than most other versions of SPICE. Unlike SPICE3 which is an automatic conversion of Fortran to C of the original SPICE program, gnucap has been written from the ground up, in C++ using the Standard Templates Library. The code therefore is lot cleaner than the original SPICE in case you are one of those persons like me, that is inclined to look under the hood. But the biggest benefit of putting the software to use is that it comes with easy installation of the BSIM models and many other device models. It also provides a model compiler that allows you to create or further develop your own models with greater ease. The software can be downloaded from here. Make sure you download the latest version and build it with some fairly recent g++ libraries in order to avoid compilation problems. You can also download the models that you can link and dynamically link into gnucap from here. Go to the gnucap's home directory for more information.
To view the results from gnucap SPICE you can use the gwave viewer. This screenshot. shows you what it does. Go to the gwave homesite for information on how to download it and compile it.
The world of synthesis provides a lot of resources to convert Verilog or VHDL into VLSI circuits very quickly. Synthesis, generally lets you create ckts that target ASIC (Application Specific Integrated Circuits) Libraries, or FPGA (Field Programmable Devices, with great ease. Synthesis tools often provide quick generation of properly scaled ckts that can meet timing, area or power constraints. No EE should ignore the opportunities provided by synthesis tools to convert a logic circuit into working devices in record speed. An excellent resource for information on synthesis tools, ASIC and FPGA design is: asic-world.com .
The opencores website (http://www.opencores.org) contains numerous designs for processors and circuits, in a variety of models. These models are oriented at functional operations (not synthesis). The site also has links and provides access to nunerous EDA tools.
Tips for documentation. Everyone sooner or later needs to establish a way of writing papers, a de facto standard in academia and much of industry is of course the beloved Latex package. However when writing mathematical symbols it can be very time consuming to recall the name of mathematical symbols. The following web application solves that problem by allowing you to draw the symbol you would like to use. Try it you will like it. The name of this tool is Detexify, it can be found at: http://detexify.kirelabs.org/classify.html . BTW, a nice website to find Cheat Cheats, for Latex and anything else imaginable is: http://www.cheat-sheets.org/#LaTeX; enjoy.
Need to review a college course, ranging from the simple to the complex. MIT has an incredible resource available. The MIT Open CourseWare provides 1700 courses in a wide range of topics, all freely available for download